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Sophie Wilson - The Future of Microprocessors

7 videos recommended on HN
YouTube
2 HN users recommended this talk2 months2016–2018 score 2
Years with an HN recommendation, 2007–2026

HN commenters cite it for the claim that process scaling beyond 28nm is uneconomic and for dark silicon.

Sophie Wilson, designer of the ARM instruction set, discusses the future of microprocessors, including the economics of scaling below 28nm and why much of a chip must stay powered off.

“Highly recommend watching this video” (HN, 2016)

2 recommendations · 2 citations · Talks · intermediate · partly dated

4 Hacker News comments

From the HN archive; up to 20 kept per video, favoring different commenters. Recommendations first.

@dkarapetyan Dec 2016 Recommends
on HN thread This AI Boom Will Also Bust
Moore's law has been dead for a while now. Most of the chip in your phone is powered off because otherwise it would burn up. Highly recommend watching this video: [this video]
Explains why most of a chip is powered off.
@gens May 2017 Recommends
on HN thread The Race to 10/7nm
It is hard (read expensive) to go under 14nm. Sophie Wilson talks about it much better then i could. [this video]
Explains cost of going below 14nm.

Citations, criticism and jokes

@qznc Feb 2017 Cites it
on HN thread What happened to clockless computer chips?
> when Moore's Law hits physical limits? It already did. Sophie Wilson said [0] its 28nm for ever. Scaling further makes no economic sense (unless you really need the space, e.g. in Smartphones). [0] [this video]
Source for claim that scaling below 28nm is uneconomic.
@zengid May 2018 Cites it
on HN thread C Is Not a Low-Level Language
Read more
I agree that this article hits pretty hard against a lot of assumptions about how our machines are working. I also feel like the author is trying to say something about how imperative scalar (meaning 'operates on one datum at a time') languages are causing more trouble than they're worth. Sophie Wilson said something similar in her talk about the future of microprocessors [1]. This implies that declarative and functional semantics would be more amenable to parallelization, as the author mentions in the article, as well as allowing the compiler more freedom to deduce a suitable 'reordering' of operations that would better fit the memory access heuristics the machine is using. [1] [this video]
Wilson makes similar point about scalar imperative languages.

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